Design for testability of analog/digital networks
- 1 May 1989
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Industrial Electronics
- Vol. 36 (2) , 227-230
- https://doi.org/10.1109/41.19073
Abstract
The testing of analog/digital integrated circuits is difficult since they allow direct access to relatively few signals. Since the probing of component pins is the fundamental chip production test technique (and possibly that of board test as well, i.e. in-circuit test), methods must be found to enhance the controllability and observability of internal signal networks. The authors provide a set of design for testability (DFT) principles that enhance their ability to test these networks when combined with the requisite analog test plans.<>Keywords
This publication has 4 references indexed in Scilit:
- The loophole in logic test: mixed signal ASICPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- Design for testability for mixed analog/digital ASICsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- Design for testability of mixed signal integrated circuitsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- Design for Testability—A SurveyIEEE Transactions on Computers, 1982