A safe single-phase clocking scheme for CMOS circuits
- 1 January 1988
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 23 (1) , 280-283
- https://doi.org/10.1109/4.289
Abstract
No abstract availableKeywords
This publication has 3 references indexed in Scilit:
- Dynamic logic CMOS circuitsIEEE Journal of Solid-State Circuits, 1984
- Cascode voltage switch logic: A differential CMOS logic familyPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1984
- High-speed compact circuits with CMOSIEEE Journal of Solid-State Circuits, 1982