Circuit Applications of Transient Annealing
- 1 January 1971
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Nuclear Science
- Vol. 18 (6) , 250-257
- https://doi.org/10.1109/tns.1971.4326440
Abstract
A method is presented for predicting transistor annealing factors, in continuously ON devices, from a simple electrical measurement on a device. A nomograph has been derived from experimental data which relates annealing factors at any time after exposure to the electron density in the base-emitter space-charge region. The electron density in this region can be obtained by a single measurement of VEE, at the transistor operating current of interest. The effects of transient annealing are investigated for two typical circuit situations (power-inverter circuits and logic circuits) where devices may be OFF during irradiation and subsequently required to turn ON. The Darlington circuits utilized in typical power-inverters prolong the annealing, if OFF when exposed. The propagation delay of a NAND gate series pair is increased considerably at early times after a neutron exposure. This additional delay can result in reduced pulse width or lost pulses.Keywords
This publication has 6 references indexed in Scilit:
- Neutron Produced Trapping Centers in Junction Field Effect TransistorsIEEE Transactions on Nuclear Science, 1971
- Short-Term Annealing in p-Type SiliconIEEE Transactions on Nuclear Science, 1970
- Transient annealing of defects in irradiated silicon devicesProceedings of the IEEE, 1970
- Injection Dependence of Transient Annealing in Neutron-Irradiated Silicon DevicesIEEE Transactions on Nuclear Science, 1967
- Transient Annealing in Sekiconductor Devices Following Pulsed Neutron IrradiationIEEE Transactions on Nuclear Science, 1966
- ROOM TEMPERATURE ANNEALING OF SILICON TRANSISTOR PARAMETERS DEGRADED BY A BURST OF NEUTRONSPublished by Office of Scientific and Technical Information (OSTI) ,1964