Statistical Analysis of Logic Circuit Performance in Digital Systems

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Abstract
A digital system usually contains large numbers of relatively few basic circuit configurations. The over-all performance of such a system is largely limited by the characteristics of these building block circuits. If these characteristics (speed, logical gain, noise margin) are treated on a statistical basis as opposed to a worst case approach, substantial improvements in logical design flexibility may be attained. This paper reviews methods for combining statistical distributions of a set of parameters to obtain the distributions of the performance characteristics. Both algebraic and numerical (Monte Carlo) methods are considered. Transistor Resistor Logic circuits are then analyzed in more detail. Resultant distributions of propagation delays and logical gain are obtained as functions of circuit parameter distributions, logical configuration and temperature. Comparisons with worst-case design figures are made to indicate the extent to which statistical techniques improve predicted performance. In addition, some new circuit configurations, proved usable by statistical analysis, are shown to lead to greater economy and reliability.

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