Improvement of breakdown voltage in SOI n-MOSFETs using the gate-recessed (GR) structure
- 1 April 1996
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Electron Device Letters
- Vol. 17 (4) , 175-177
- https://doi.org/10.1109/55.485165
Abstract
A gate-recessed structure is introduced to SOI MOSFETs in order to increase the source-to-drain breakdown voltage. A significant increase in the breakdown voltage can be seen compared with that of a planar single source/drain SOI MOSFET without inducing the appreciable reduction of the current drivability. We have analyzed the origin of the breakdown voltage improvement by the substrate current measurements and 2-D device simulations, and shown that the breakdown voltage improvement is caused by the reductions in the impact ionization rate and the parasitic bipolar current gain.Keywords
This publication has 7 references indexed in Scilit:
- Technology trends of silicon-on-insulator-its advantages and problems to be solvedPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Detailed characterization and analysis of the breakdown voltage in fully depleted SOI n-MOSFET'sIEEE Transactions on Electron Devices, 1994
- A time dependent hydrodynamic device simulator SNU-2D with new discretization scheme and algorithmIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1994
- Source-to-drain breakdown voltage improvement in ultrathin-film SOI MOSFET's using a gate-overlapped LDD structureIEEE Transactions on Electron Devices, 1994
- Nonisothermal device simulation using the 2D numerical process/device simulator TRENDY and application to SOI-devicesIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1994
- The enhancement of gate-induced-drain-leakage (GIDL) current in short-channel SOI MOSFET and its application in measuring lateral bipolar current gain betaIEEE Electron Device Letters, 1992
- Analysis and control of floating-body bipolar effects in fully depleted submicrometer SOI MOSFET'sIEEE Transactions on Electron Devices, 1991