Large integrated crossbar switch
- 19 November 2002
- proceedings article
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
No abstract availableKeywords
This publication has 6 references indexed in Scilit:
- On fault probabilities and yield models for analog VLSI neural networksPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- Wafer-scale integration as a technology choice for high speed ATM switching systemsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Circuit design for a large area high-performance crossbar switchPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Reduction of simultaneous-switching noise in large crossbar networksIEEE Transactions on Circuits and Systems, 1991
- VLASIC: A Catastrophic Fault Yield Simulator for Integrated CircuitsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1986
- Yield Model for Productivity Optimization of VLSI Memory Chips with Redundancy and Partially Good ProductIBM Journal of Research and Development, 1980