622 Mbit/s CMOS limiting amplifier with 40 dB dynamicrange
- 26 September 1996
- journal article
- Published by Institution of Engineering and Technology (IET) in Electronics Letters
- Vol. 32 (20) , 1920-1922
- https://doi.org/10.1049/el:19961256
Abstract
A monolithic, fully differential limiting amplifier has been successfully demonstrated in 1 µm CMOS technology. The amplifier exhibits high input dynamic range of 40 dB (from 15 mVP-P to 1.5 VP-P) at constant output voltage swing of 800 mVP-P into 50 Ω, operating at 622 Mbit/s. This CMOS limiting amplifier is characterised by high speed, with sensitivity, and wide dynamic range.Keywords
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