Analysis of load structures for current-mode logic
- 1 February 1975
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 10 (1) , 72-75
- https://doi.org/10.1109/JSSC.1975.1050557
Abstract
Integrated circuit technology allows load characteristics to be shaped to the requirements of a circuit. Because it is possible to claim advantages for a variety of loads, a computer-aided analysis is used to relate the transient characteristics of a current-mode logic circuit to its static load line. A variety of load lines have been studied and an integrated diode-clamped-type load structure appears to offer the best static and dynamic characteristics.Keywords
This publication has 8 references indexed in Scilit:
- Development of an ECL gate with a 300 ps propagation delayPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1971
- Rise time optimization of high-speed digital fanout circuitsIEEE Journal of Solid-State Circuits, 1969
- Theory of lateral transistorsSolid-State Electronics, 1967
- Integrated Conditioned OR and Inhibited OR Logic CircuitsIEEE Journal of Solid-State Circuits, 1966
- On Measures of Logic Performance: Logic Quantum, Factor, and Figure of MeritIBM Journal of Research and Development, 1966
- Design of ACP Tunnel-Diode-Coupled CircuitsIBM Journal of Research and Development, 1964
- Lateral complementary transistor structure for the simultaneous fabrication of functional blocksProceedings of the IEEE, 1964
- Design of ACP Resistor-Coupled Switching CircuitsIBM Journal of Research and Development, 1963