Abstract
A 0.35-V low-phase-noise oscillator using a standard 0.18-/spl mu/m CMOS process is presented. Ultra-low-voltage operation is achieved by using on-chip transformers in positive feedback loops to swing the output signals above the supply and below the ground potential. This dual-swing capability maximizes the carrier power and achieves low-voltage low-phase-noise performance. A 1.4-GHz oscillator prototype is designed for a 0.35-V supply using PMOS transistors with the threshold voltage around 0.52 V. Power consumption is 1.46 mW while phase noise is -128.6 dBc/Hz at 1-MHz frequency offset corresponding to a figure of merit of 189.8 dB.

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