LSI Yield Projections Based Upon Test Pattern Results: An Application to Multilevel Metal Structures
- 1 December 1974
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Parts, Hybrids, and Packaging
- Vol. 10 (4) , 230-234
- https://doi.org/10.1109/tphp.1974.1134868
Abstract
No abstract availableKeywords
This publication has 5 references indexed in Scilit:
- Defect analysis and yield degradation of integrated circuitsIEEE Journal of Solid-State Circuits, 1974
- Applying a composite model to the IC yield problemIEEE Journal of Solid-State Circuits, 1974
- Processes for multilevel metallizationJournal of Vacuum Science and Technology, 1974
- Defect density distribution for LSI yield calculationsIEEE Transactions on Electron Devices, 1973
- Cost-size optima of monolithic integrated circuitsProceedings of the IEEE, 1964