18 ps ECL-gate delay in laterally scaled 30 GHz bipolar transistors

Publisher Website

17 December 2002

conference paper
Published by Institute of Electrical and Electronics Engineers (IEEE)

https://doi.org/10.1109/iedm.1994.383297

Abstract

No abstract available

This publication has 3 references indexed in Scilit:

Optimization of SiGe HBT technology for high speed analog and mixed-signal applications
Published by Institute of Electrical and Electronics Engineers (IEEE) ,2002
15 Gbit/s silicon bipolar amplifier ICusing a novel mounting technique
Electronics Letters, 1995
Sub-20 ps silicon bipolar technology using selective epitaxial growth
Published by Institute of Electrical and Electronics Engineers (IEEE) ,1992