A New Erasing And Row Decoding Scheme For Low Supply Voltage Operation 16Mb/64Mb Flash EEPROMs

Publisher Website

1 January 1991

conference paper
Published by Institute of Electrical and Electronics Engineers (IEEE)

p. 85-86
https://doi.org/10.1109/vlsic.1991.760090

Abstract

No abstract available

Keywords

This publication has 2 references indexed in Scilit:

A 5 volt only 16M bit flash EEPROM cell with a simple stacked gate structure
Published by Institute of Electrical and Electronics Engineers (IEEE) ,2002
A 4 Mb 5 V-only flash EEPROM with sector erase
Published by Institute of Electrical and Electronics Engineers (IEEE) ,1990