A four-state ROM using multilevel process technology
- 1 April 1984
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 19 (2) , 174-179
- https://doi.org/10.1109/jssc.1984.1052114
Abstract
A four-state ROM is described which reduces conventional two-state ROM matrix size by 50%. The four states are encoded in the matrix by varying device thresholds using multiple ion implants. This is called multilevel technology. The detection of matrix device type is determined by the length of time required for a linearly ramped word line to rise from 0 V to the point where the matrix device is turned on. Peripheral circuitry has been devised to measure this time period and output the device type as a two-bit binary code. A 128K ROM which incorporates the new multilevel matrix cell has been fabricated in 6-/spl mu/m metal gate technology. Die size of the ROM is 208/spl times/213 mils/SUP 2/.Keywords
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