Multiplier policies for digital signal processing
- 1 January 1990
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE ASSP Magazine
- Vol. 7 (1) , 6-20
- https://doi.org/10.1109/53.45968
Abstract
The successful design of digital signal processing (DSP) systems and subsystems is often predicated on realizing fast multiplication in digital hardware. This tutorial provides the reader with a broad perspective of this important field and the pedagogy needed to understand the basic principles of digital multiplication. Both conventional and nonconventional methods of implementing multiplication, representing a mix of speed/complexity tradeoffs, are presented. Some are based on traditional shift-add structures, whereas others strive for greater mathematical sophistication. Topics include stand-alone fixed-point multipliers, cellular arrays, memory intensive policies, homomorphic systems, and modular arithmetic.Keywords
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