Design and performance of a thin film ferroelectric-photoconductor storage device

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Abstract
A new configuration of a ferroelectric/photoconductor (FE/PC) memory chip is described. The substrate electrode is divided into three islands; a bus bar and two ground or reference islands. A 1-μm film of the ferroelectric Pb0.92 Bi0 07La0 01 (Fe0.4.05Nb0.325Zr0.27)O3 is sputtered on the two ground or reference islands. A discontinuous film of gold is deposited on the ferroelectric, and a CdSe photoconductor about 0.7 μm thick is evaporated on the entire surface covering the ferroelectric and bus bar. The top 'transparent electrode' consists of a pattern of thin strips of gold 2 μm wide, separated by 4 μm spaces, covering the entire surface of the device which measures 1.27 cm × 1.27 cm. Two light beams are used to access the device. In comparison with prior art designs, this design yields a reduction of about 1000 in the noise from the unaddressed area of the device, permitting easier detection of signals from the addressed spots. The charging time constants for the strips are quite satisfactory for switching of the device in 50 μsec. Experimental data showing the functioning of the device are presented.

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