CMOS subnanosecond true-ECL output buffer
- 1 January 1990
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 25 (1) , 150-154
- https://doi.org/10.1109/4.50297
Abstract
No abstract availableKeywords
This publication has 4 references indexed in Scilit:
- CMOS subnanosecond true-ECL output bufferPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1989
- Fast CMOS ECL receivers with 100-mV worst-case sensitivityIEEE Journal of Solid-State Circuits, 1988
- A 2- mu m CMOS digital adaptive equalizer chip for QAM digital radio modemsIEEE Journal of Solid-State Circuits, 1988
- A 6.2 ns 64Kb CMOS RAM with ECL interfacesPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1988