Learning probabilistic RAM nets using VLSI structures
- 1 January 1992
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Computers
- Vol. 41 (12) , 1552-1561
- https://doi.org/10.1109/12.214663
Abstract
No abstract availableKeywords
This publication has 19 references indexed in Scilit:
- Learning sequential structure with recurrent pRAM netsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- pRAM automataPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- A continuous input RAM-based stochastic neural modelNeural Networks, 1991
- A real-time experiment using a 50-neuron CMOS analog silicon chip with on-chip digital learningIEEE Transactions on Neural Networks, 1991
- A SERIAL-UPDATE VLSI ARCHITECTURE FOR THE LEARNING PROBABILISTIC RAM NEURONPublished by Elsevier ,1991
- Hardware Realisable Learning AlgorithmsPublished by Springer Nature ,1990
- Random iterative networksPhysical Review A, 1990
- Pattern-recognizing stochastic learning automataIEEE Transactions on Systems, Man, and Cybernetics, 1985
- Neuronlike adaptive elements that can solve difficult learning control problemsIEEE Transactions on Systems, Man, and Cybernetics, 1983
- Spontaneous behaviour in neural networksJournal of Theoretical Biology, 1972