Comparison of high-field stress effects in metal-oxide-semiconductor structures with aluminum and polycrystalline silicon gates using internal photoemission measurements

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Abstract
The effects of high-field stressing (9–10 MV/cm) with positive gate voltage on charges and defects in the SiO2 layer of metal-oxide-semiconductor structures are reported. In Al-gate devices negative charge builds up near the Si-SiO2 interface whereas positive charge is generated near the Al-SiO2 interface. Subsequent avalanche injection of electrons into the oxide does not annihilate the positive charge but the negative charge disappears. Similar studies were performed on polycrystalline silicon gate devices for which internal photoemission (photo I-V) measurements are reported for the first time. In this case a negative charge distribution is observed near both SiO2 interfaces after a positive stress and additional electron traps are created near the noninjecting polycrystalline silicon/SiO2 interface. Similarly, a negative stress for a polycrystalline silicon gate device creates electron traps near the substrate Si-SiO2 interface, as reported previously for Al-gate devices.