Automatic verification of timed circuits
- 1 January 1994
- book chapter
- Published by Springer Nature
- p. 468-480
- https://doi.org/10.1007/3-540-58179-0_76
Abstract
No abstract availableKeywords
This publication has 12 references indexed in Scilit:
- An implementation of three algorithms for timing verification based on automata emptinessPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- Symbolic model checking for real-time systemsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- Synthesis of timed asynchronous circuitsIEEE Transactions on Very Large Scale Integration (VLSI) Systems, 1993
- Delay analysis in synchronous programsPublished by Springer Nature ,1993
- Efficient verification of parallel real-time systemsPublished by Springer Nature ,1993
- Semi-modularity and testability of speed-independent circuitsIntegration, 1992
- What good are digital clocks?Published by Springer Nature ,1992
- Modeling and verification of time dependent systems using time Petri netsIEEE Transactions on Software Engineering, 1991
- Trace Theory for Automatic Hierarchical Verification of Speed-Independent CircuitsPublished by MIT Press ,1989
- Trace Theory and the Definition of Hierarchical ComponentsPublished by Springer Nature ,1983