The effect of series resistance on threshold voltage measurement techniques for fully depleted SOI MOSFETs

This publication has 13 references indexed in Scilit:

• Optimization of series resistance in sub-0.2 /spl mu/m SOI MOSFET's
  IEEE Electron Device Letters, 1994
• Recessed-channel structure for fabricating ultrathin SOI MOSFET with low series resistance
  IEEE Electron Device Letters, 1994
• A consistent experimental method for the extraction of the threshold voltage of SOI nMOSFETs from room down to cryogenic temperatures
  Solid-State Electronics, 1993
• Interface characterization of fully depleted SOI MOSFETs by a threshold-voltage method
  Solid-State Electronics, 1993
• Evidence of different conduction mechanisms in accumulation-mode p-channel SOI MOSFET's at room and liquid-helium temperatures
  IEEE Transactions on Electron Devices, 1993
• Determination of Flat-Band Voltages for Fully Depleted Silicon-on-Insulator (SOI) Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFET's)
  Japanese Journal of Applied Physics, 1992
• Threshold voltage and C-V characteristics of SOI MOSFET's related to Si film thickness variation on SIMOX wafers
  IEEE Transactions on Electron Devices, 1992
• Measurement of threshold voltages of thin-film accumulation-mode PMOS/SOI transistors
  IEEE Electron Device Letters, 1991
• Modeling of transconductance degradation and extraction of threshold voltage in thin oxide MOSFET's
  Solid-State Electronics, 1987
• Accuracy of an effective channel length/External resistance extraction algorithm for MOSFET's
  IEEE Transactions on Electron Devices, 1984