HSST BiCMOS technology with 26 ps ECL and 45 ps 2 V CMOS inverter
- 4 December 2002
- proceedings article
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 493-496
- https://doi.org/10.1109/iedm.1990.237060
Abstract
No abstract availableKeywords
This publication has 2 references indexed in Scilit:
- A high-performance 0.25- mu m CMOS technology. II. TechnologyIEEE Transactions on Electron Devices, 1992
- Gigabit logic bipolar technology: advanced super self-aligned process technologyElectronics Letters, 1983