A 80 Mb/s low-power scalable turbo codec core
- 25 June 2003
- proceedings article
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
No abstract availableKeywords
This publication has 4 references indexed in Scilit:
- Near Shannon limit error-correcting coding and decoding: Turbo-codes. 1Published by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- A comparison of optimal and sub-optimal MAP decoding algorithms operating in the log domainPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Real-time algorithms and VLSI architectures for soft output MAP convolutional decodingPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Memory optimization of MAP turbo decoder algorithmsIEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2001