Silicon-sapphire interface charge trapping - effects of sapphire type and EPI growth conditions

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Abstract
The total ionizing radiation induced charge trapping effects at the silicon-sapphire interface of SOS (silicon on sapphire) devices have been characterized as a function of type of starting sapphire, sapphire polish, pre-epi annealing, and epitaxial silicon growth condition. The starting sapphire wafers were derived from the three basic growth methods which are Czochralski, ribbon (or edge defined), and gradient furnace (Schmidt-Viechnicki). The sapphire wafers were polished by different sources, and both hydrogen and air pre-epi annealing environments were used. The epitaxial silicon was grown using the standard uniform growth rate method and the "burst" method. The magnitude of the radiation induced charge trapping at the silicon-sapphire interface is correlated with the various processing variables and related to the back channel leakage currents of n-channel enhancement mode MISFET's. The amount of trapped charge is dependent on the bias applied during radiation and is non-uniform under the channel region of the FET devices.

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