GENRIF: An integrated VLSI FIR filter compiler
- 30 December 2002
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 466-471
- https://doi.org/10.1109/edac.1993.386431
Abstract
An integrated VLSI FIR filter compiler tool targeted at sampling rates from 0 to more than 100 MHz is described. Main features are high-level synthesis and optimization of FIR filter coefficients with respect to frequency specifications, a priori and a posteriori verification of filter response (including finite word length effects), and layout generation based on a bit-parallel architecture. The tool is fully integrated within the GDT environment (Mentor Graphics).Keywords
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