Blanket LVD tungsten silicide technology for smart power applications
- 1 June 1989
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Electron Device Letters
- Vol. 10 (6) , 270-273
- https://doi.org/10.1109/55.31743
Abstract
A high-frequency power MOSFET structure fabricated using blanket deposited LPCVD (low-pressure chemical vapor deposition) WSi/sub 2/ gate and selectively deposited LPCVD tungsten source contact metallurgy is reported. A high-density power MOSFET technology suitable for smart power applications which simultaneously lowers the gate sheet resistance and source contact resistance is discussed. This technology was used to fabricate 30-V and 50-V power FETs with excellent high-frequency performances. The measured specific on-resistance R/sub sp/, specific input capacitance C/sub sp/, and switching times are among the lowest reported in the literature for any power FET structure in this reverse blocking voltage range.Keywords
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