Suppression of parasitic bipolar effects in thin-film SOI transistors
- 1 April 1992
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Electron Device Letters
- Vol. 13 (4) , 198-200
- https://doi.org/10.1109/55.145019
Abstract
In order to correctly estimate the bipolar holding voltage of thin-film SOI transistors with submicrometer gate lengths, it is necessary to obtain the correct balance between the bipolar current gain and impact ionization. The bipolar current gain was found to be strongly dependent upon bandgap narrowing in the heavily doped source, while impact ionization may be most accurately modeled with a nonlocal ballistic model employing a composite electron mean-free path of 9.2 nm. Simulation with the improved models suggests that a reduction in the lateral electric field of the n/sup -/ drain region, and hence an increased bipolar holding voltage, may be achieved by using ultrathin highly doped SOI films. For a 0.5- mu m gate length, a maximum holding voltage in excess of 6 V has been simulated.Keywords
This publication has 9 references indexed in Scilit:
- Structure design for submicron MOSFET on ultra thin SOIPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Analysis and control of floating-body bipolar effects in fully depleted submicrometer SOI MOSFET'sIEEE Transactions on Electron Devices, 1991
- Characterization of bipolar snapback and breakdown voltage in thin-film SOI transistors by two-dimensional simulationIEEE Transactions on Electron Devices, 1991
- Analysis of the drain breakdown mechanism in ultra-thin-film SOI MOSFETsIEEE Transactions on Electron Devices, 1990
- Anomalous subthreshold current—Voltage characteristics of n-channel SOI MOSFET'sIEEE Electron Device Letters, 1987
- Surface impact ionization in silicon devicesPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1987
- An impact ionization model for two-dimensional device simulationIEEE Transactions on Electron Devices, 1985
- Simultaneous measurement of hole lifetime, hole mobility and bandgap narrowing in heavily doped n-type siliconPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1985
- Problems related to p-n junctions in siliconSolid-State Electronics, 1961