The message-driven processor: a multicomputer processing node with efficient mechanisms

1 April 1992

journal article
Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Micro

Vol. 12 (2) , 23-39
https://doi.org/10.1109/40.127581

Abstract

The message-driven processor (MDP), a 36-b, 1.1-million transistor, VLSI microcomputer, specialized to operate efficiently in a multicomputer, is described. The MDP chip includes a processor, a 4096-word by 36-b memory, and a network port. An on-chip memory controller with error checking and correction (ECC) permits local memory to be expanded to one million words by adding external DRAM chips. The MDP incorporates primitive mechanisms for communication, synchronization, and naming which support most proposed parallel programming models. The MDP system architecture, instruction set architecture, network architecture, implementation, and software are discussed.

Keywords

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