Electrical performance of triple implanted vertical silicon carbide MOSFETs with low on-resistance
- 20 January 2003
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
This paper describes results of 6H silicon carbide vertical power MOSFETs designed for different blocking capabilities: 600 V and 1600 V. The fabrication is based on a triple implantation technique with a lateral inversion channel. The MOSFETs are normally off and exhibit specific on-resistances of 22 and 40 m/spl Omega/cm/sup 2/, respectively. A chip area of 1 mm/sup 2/ has emerged as a suitable value in order to achieve an acceptable yield with respect to the blocking capability. A SiC MOSFET of this size can be driven up to 1 A in continuous operation. As expected for a unipolar device, short turn-on and turn-off delay times have been measured. In particular, due to a very small accumulation zone, the Miller capacitance is small in comparison to Si MOSFETs. The switching speed can be influenced by the gate driving circuit in a wide range. The SiC MOSFET is controllable in all switching states and stable up to 125/spl deg/C case temperature. The switching behaviour tested under conditions typical for motor drives is robust against short cuts and short time overloading.Keywords
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