Reliability: a possible showstopper for oxide thickness scaling?

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Abstract
Gate oxide reliability is an essential factor in qualifying CMOS technologies. An accurate and consistent methodology for determining ultrathin oxide reliability is therefore needed. In this paper, the crucial steps of this methodology are analysed. First it is demonstrated that soft and hard breakdown show an identical distribution and therefore extrapolation, from the test voltage to a voltage where the soft to hard breakdown prevalence ratio is different, is allowed. Secondly, the log-normal distribution is shown to be inadequate to describe the tBD-statistics; only the Weibull distribution can be used. Thirdly, based on stress-induced leakage current measurements, it is concluded that a ln(tBD)-Vg-dependence is well suited to extrapolate high voltage tBD-data to low voltage. It is demonstrated that in the 1 to 2 V range, the gate voltage shows no threshold value below which the oxide degradation is reduced or altered. A detailed analysis in the oxide thickness range 2 to 5 nm is presented showing that oxide reliability might become a major showstopper for the further downscaling of CMOS technology. Possible flaws in the reliability prediction methodology are discussed and guidelines for future research are indicated.