CMOS downsizing toward sub-10 nm
- 1 April 2004
- journal article
- Published by Elsevier in Solid-State Electronics
- Vol. 48 (4) , 497-503
- https://doi.org/10.1016/j.sse.2003.09.034
Abstract
No abstract availableKeywords
This publication has 1 reference indexed in Scilit:
- Extreme scaling with ultra-thin Si channel MOSFETsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003