Implementation of the data-flow synchronous language SIGNAL
- 1 June 1995
- journal article
- Published by Association for Computing Machinery (ACM) in ACM SIGPLAN Notices
- Vol. 30 (6) , 163-173
- https://doi.org/10.1145/223428.207134
Abstract
This paper presents the techniques used for the compilation of the data-flow, synchronous language SIGNAL. The key feature of the compiler is that it performs formal calculus on systems of boolean equations. The originality of the implementation of the compiler lies in the use of a tree structure to solve the equations.Keywords
This publication has 6 references indexed in Scilit:
- Implicit state enumeration of finite state machines using BDD'sPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Using VHDL for Link to Synthesis ToolsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1994
- The Esterel synchronous programming language: design, semantics, implementationScience of Computer Programming, 1992
- The synchronous approach to reactive and real-time systemsProceedings of the IEEE, 1991
- LUSTRE: a declarative language for real-time programmingPublished by Association for Computing Machinery (ACM) ,1987
- Graph-Based Algorithms for Boolean Function ManipulationIEEE Transactions on Computers, 1986