An eight channel 35 GSample/s CMOS timing analyzer

Publisher Website

7 November 2002

conference paper
Published by Institute of Electrical and Electronics Engineers (IEEE)

https://doi.org/10.1109/isscc.2000.839735

Abstract

No abstract available

This publication has 3 references indexed in Scilit:

A 500 MHz time digitizer IC with 15.625 ps resolution
Published by Institute of Electrical and Electronics Engineers (IEEE) ,2002
Low-jitter process-independent DLL and PLL based on self-biased techniques
IEEE Journal of Solid-State Circuits, 1996
Precise delay generation using coupled oscillators
IEEE Journal of Solid-State Circuits, 1993