An MOS transistor model for analog circuit design
- 1 January 1998
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 33 (10) , 1510-1519
- https://doi.org/10.1109/4.720397
Abstract
No abstract availableThis publication has 8 references indexed in Scilit:
- A g/sub m//I/sub D/ based methodology for the design of CMOS analog circuits and its application to the synthesis of a silicon-on-insulator micropower OTAIEEE Journal of Solid-State Circuits, 1996
- An explicit physical model for the long-channel MOS transistor including small-signal parametersSolid-State Electronics, 1995
- An analytical MOS transistor model valid in all regions of operation and dedicated to low-voltage and low-current applicationsAnalog Integrated Circuits and Signal Processing, 1995
- MOSFET modeling for analog circuit CAD: problems and prospectsIEEE Journal of Solid-State Circuits, 1994
- A small signal dc-to-high-frequency nonquasistatic model for the four-terminal MOSFET valid in all regions of operationIEEE Transactions on Electron Devices, 1985
- On the small-signal behaviour of the MOS transistor in quasistatic operationSolid-State Electronics, 1983
- A charge-sheet model of the MOSFETSolid-State Electronics, 1978
- A simple and accurate approximation to the high-frequency characteristics of insulated-gate field-effect transistorsSolid-State Electronics, 1969