Performance of the 3-D PENCIL flash EPROM cell and memory array
- 1 January 1995
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Electron Devices
- Vol. 42 (11) , 1982-1991
- https://doi.org/10.1109/16.469407
Abstract
No abstract availableKeywords
This publication has 5 references indexed in Scilit:
- 0.6 mu m EPROM cell design based on a new scaling scenarioPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- Performance of the 3-D sidewall flash EPROM cellPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- A 5 volt only 16M bit flash EEPROM cell with a simple stacked gate structurePublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- A 2.3 mu m/sup 2/ memory cell structure for 16 Mb NAND EEPROMsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- A 3-D sidewall flash EPROM cell and memory arrayIEEE Electron Device Letters, 1993