Half-Swing Clocking Scheme for 75% Power Saving in Clocking Circuitry
- 24 August 2005
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
No abstract availableKeywords
This publication has 3 references indexed in Scilit:
- Low power on-chip supply voltage conversion scheme for 1G/4G bit DRAMsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- A multi-cycle operational signal processing core for an adaptive equalizer for magnetic system applicationPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Low-power CMOS digital designIEEE Journal of Solid-State Circuits, 1992