Front-end CMOS chipset for fiber-based gigabit Ethernet

27 November 2002

conference paper
Published by Institute of Electrical and Electronics Engineers (IEEE)

p. 188-191
https://doi.org/10.1109/vlsic.1998.688079

Abstract

We present three front-end ICs implemented in 0.6 /spl mu/m CMOS process that meet or exceed the specifications for 1.25 Gb/s fiber-based gigabit Ethernet. The two-stage differential transimpedance amplifier utilizes bondwire based inductive peaking to attain 1.1 GHz bandwidth. The quantizer employs novel modified Cherry-Hooper architecture to achieve a 52 dB dynamic range and 1.5 GHz bandwidth. The laser driver features on chip automatic laser power control circuitry and provides up to 40 mA of modulation current at 1.25 Gb/s.

Keywords

ETHERNET NETWORKS
BANDWIDTH
FIBER LASERS
POWER LASERS
CMOS PROCESS
DIFFERENTIAL AMPLIFIERS
BONDING
DYNAMIC RANGE
DRIVER CIRCUITS
POWER CONTROL

This publication has 1 reference indexed in Scilit:

622 Mbit/s CMOS limiting amplifier with 40 dB dynamicrange
Electronics Letters, 1996