Memory organization for improved data cache performance in embedded processors

This publication has 12 references indexed in Scilit:

• Optimal code placement of embedded software for instruction caches
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,2002
• Reducing address bus transition for low power memory mapping
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,2002
• Instruction-set matching and selection for DSP and ASIP code generation
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,2002
• Improving direct-mapped cache performance by the addition of a small fully-associative cache and prefetch buffers
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,2002
• Memory bank and register allocation in software synthesis for ASIPs
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,2002
• Performance estimation of embedded software with instruction cache modeling
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,2002
• A data locality optimizing algorithm
  Published by Association for Computing Machinery (ACM) ,1991
• Software prefetching
  Published by Association for Computing Machinery (ACM) ,1991
• An efficient microcode compiler for application specific DSP processors
  IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1990
• Strategies for cache and local memory management by global program transformation
  Journal of Parallel and Distributed Computing, 1988