A 7 MHz 24-bit pipelined accumulator in 1.2- mu m CMOS for application as a numerically controlled oscillator

Publisher Website

9 December 2002

conference paper
Published by Institute of Electrical and Electronics Engineers (IEEE)

https://doi.org/10.1109/cicc.1991.164026

Abstract

No abstract available

Keywords

This publication has 3 references indexed in Scilit:

A high speed pipelined CMOS accumulator for implementing numerically controlled oscillators
Published by Institute of Electrical and Electronics Engineers (IEEE) ,2002
Influence of transmission-line interconnections between gigabit-per-second ICs on time jitter and instabilities
IEEE Journal of Solid-State Circuits, 1990
High-speed CMOS circuit technique
IEEE Journal of Solid-State Circuits, 1989