Low Temperature Poly-Si TFTs Using Solid Phase Crystallization of Very Thin Films and an Electron Cyclotron Resonance Chemical Vapor Deposition Gate Insulator
- 1 December 1991
- journal article
- Published by IOP Publishing in Japanese Journal of Applied Physics
- Vol. 30 (12S)
- https://doi.org/10.1143/jjap.30.3724
Abstract
Low temperature (T≦600°C) polycrystalline silicon thin film transistors (poly-Si TFTs) have been fabricated by solid phase crystallization (SPC) of amorphous silicon (a-Si) films deposited by low pressure chemical vapor deposition (LPCVD). These TFTs are distinguished by the very thin nature of the channel Si layer (25 nm) and the use of an SiO2 gate insulator deposited by electron cyclotron resonance chemical vapor deposition (ECR-CVD). The present process eliminates the need for hydrogenation and produces mobilities greater than 20 cm2/V·s and on/off current ratios greater than 107.Keywords
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