Hierarchical floorplanning and detailed global routing with routing-based partitioning
- 4 December 2002
- proceedings article
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 1640-1643
- https://doi.org/10.1109/iscas.1990.112452
Abstract
No abstract availableKeywords
This publication has 3 references indexed in Scilit:
- A new floorplanning method with global routing based on functional partitioningPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- Overlap resolution problem for block placement in VLSI layoutElectronics and Communications in Japan (Part III: Fundamental Electronic Science), 1990
- A Linear-Time Heuristic for Improving Network PartitionsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1982