High electric-field amorphous silicon p-i-n diodes: Effect of the p-layer thickness

Abstract
We present amorphous silicon pin diodes able to sustain a reverse bias corresponding to 106 V/cm with a reasonably low leakage current. The influence of the p‐layer thickness on the reverse bias current and the breakdown voltage is investigated. The high‐voltage reverse current at room temperature is attributed to two different mechanisms: field enhanced thermal generation in the pi interface region and, at the highest bias, electron injection through the p layer. Variable range hopping is also contributing to the low‐temperature reverse current. Charge collection measurements after pulsed photogeneration were also performed up to the maximum voltage. No evidence for signal amplification is found, which sets a lower limit of 106 V/cm for impact ionization and avalanche phenomena.