The behavior of silicon p-n junction-based devices at liquid helium temperatures

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Abstract
In this paper, the forward current‐voltage (I‐V) characteristics of Si p‐n junction diodes, fabricated in different state‐of‐the‐art complementary‐metal‐oxide‐semiconductor (CMOS) technologies, are investigated at liquid helium temperatures. As will be shown, three different I‐V regimes can exist: a forward breakdown/hysteresis regime at a turn‐on voltage which may be larger than the built‐in potential of the junction; a thermionic emission regime, corresponding to a I=A exp(qV/kT) relation and a high‐injection space‐charge‐limited regime, giving rise to a current which is proportional to V n . The anomalous turn‐on behavior can be explained by considering the small barrier for carrier injection, which exists at the ‘‘ohmic’’ contact. It will be demonstrated that the presence of this forward breakdown is strongly determined by the fabrication technology used. In extreme cases (large‐area well diodes) multiple breakdown is observed, indicating an inhomogeneous, filamentary current flow. As will be shown, similar breakdown behavior is observed in more complex junction‐based Si devices at 4.2 K; the consequences for deep‐cryogenic CMOS circuitry will be briefly addressed.