An enhanced technique for simulating short-circuit power dissipation
- 1 June 1989
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 24 (3) , 844-847
- https://doi.org/10.1109/4.32050
Abstract
No abstract availableThis publication has 3 references indexed in Scilit:
- An enhanced power meter for SPICE2 circuit simulationIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1988
- Accurate simulation of power dissipation in VLSI circuitsIEEE Journal of Solid-State Circuits, 1986
- Short-circuit dissipation of static CMOS circuitry and its impact on the design of buffer circuitsIEEE Journal of Solid-State Circuits, 1984