Modeling of Polysilicon Resistors, P-N Junction Diodes and Mosfet's

Abstract
Conductivity in bulk polysilicon is discussed, applicable over a wide range of dopant concentration, temperature, grain size and trap density. The I-V behavior in a lateral poly p-n junction is analytically modeled, incorporating the effects of carrier lifetime operative in crystalline grain and amorphous conducting boundary. In particular, the extremely short carrier lifetime within the grain boundary is shown to provide an ohmic conduction channel in a direction parallel to current flow. This ohmic current can account for the unusually high current levels observed at small applied voltages. Also, the shift of the threshold voltage of MOS devices, as influenced by grain traps near the channel region, is analysed.