Optimal architectures for two dimensional transforms

13 January 2003

conference paper
Published by Institute of Electrical and Electronics Engineers (IEEE)

p. 1495-1498
https://doi.org/10.1109/iscas.1989.100641

Abstract

A family of optimal architectures with area-time tradeoffs for computing two-dimensional transforms over N*N points is developed. The authors' previous design is extended to cover the case when N is not necessarily a power of 2. The scheme is generalized to develop optimal architectures for d-dimensional transforms when d>or=2.

Keywords

COMPUTER ARCHITECTURE
DISCRETE COSINE TRANSFORMS
DISCRETE FOURIER TRANSFORMS
FOURIER TRANSFORMS
DISCRETE TRANSFORMS
EDUCATIONAL INSTITUTIONS
POWER ENGINEERING COMPUTING
TWO DIMENSIONAL DISPLAYS
SPEECH PROCESSING
SPECTRAL ANALYSIS

This publication has 3 references indexed in Scilit:

VLSI Architectures for Multidimensional Fourier Transform Processing
IEEE Transactions on Computers, 1987
A concurrent architecture for VLSI implementation of discrete cosine transform
IEEE Transactions on Circuits and Systems, 1987
Efficient VLSI Networks for Parallel Processing Based on Orthogonal Trees
IEEE Transactions on Computers, 1983