Lateral isolation in SOI CMOS technology
- 4 December 2002
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
No abstract availableKeywords
This publication has 2 references indexed in Scilit:
- Gate oxide breakdown behaviour in a mesa SOI CMOS processPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- Measurement and modeling of the sidewall threshold voltage of mesa-isolated SOI MOSFETsIEEE Transactions on Electron Devices, 1989