Deep trapping effects at the GaAs-GaAs : Cr interface in GaAs FET structures

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Abstract
Transient capacitance measurements were made in order to study the interface properties of FET‐type devices with and without LPE buffer layers. No detectable traps were found in the buffered devices, whereas two deep hole traps, located 0.58 and 0.81 eV above the valence band, were detected in the unbuffered FET devices when the gate‐depletion region approached the substrate interface. The trap concentrations were 1×1016 and 2×1015 cm−3, respectively. An interface model was developed and used to show that the minority‐carrier trapping effects which appeared in the active layer are actually due to the image effect of majority‐carrier traps in the Cr‐doped substrate acting through the interface space‐charge region.