A study of high density multilayer LSI
- 4 December 2002
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 322-328
- https://doi.org/10.1109/icwsi.1990.63916
Abstract
Describes a new type of high density multilayer LSI chip which is made up of several piled chips. Prescribed interconnections on the conventional wafer, are fabricated first. Thin chips with through-holes (about the size of pad) are fixed to the available parts of the under-layer chip. Each chip is interconnected through the holes. As a result, the chips will be equivalent to a hybrid IC which has several chips. This model is equal to the large scale high density LSI, the multichip substrate system, and hybrid WSI (Wafer Scale Integration).Keywords
This publication has 2 references indexed in Scilit:
- Multilevel interconnections for wafer scale integrationJournal of Vacuum Science & Technology A, 1986
- Fabrication process, experimental results, and application for an elemental level vertically intergrated circuit (ELVIC)Journal of Materials Research, 1986