Characteristics of MOS Circuits for Radiation-Hardened Aerospace Systems

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Abstract
In the past, Metal-Oxide-Semiconductor (MOS) circuits have been unsuitable for many aerospace applications because of their sensitivity to permanent and transient radiation effects. Radiation test data on hardened p-channel MOS (PMOS) transistors now show that most permanent radiation damage can be prevented in PMOS circuits. Also, hardened PMOS transistors and circuits have been built utilizing a silicon-on-sapphire (SOS) isolation technique to minimize transient radiation effects. Analyses of dynamic and static PMOS/SOS NOR gates show that, with the electrical and radiation-hardness characteristics already attained in discrete transistors, the following circuit performance levels can be expected. Dynamic PMOS/SOS circuits will operate at 5 MHz clock rates and 112 μW/ gate power levels and will tolerate radiation levels above 107 rads(Si), 1015 n/cm2, and 109 rads(Si)/sec. Static circuits will exhibit logic delays of about 30 ns/gate at power levels of 0.37 mW/gate and will also tolerate radiation levels above 107 rads(Si), 1015 n/cm2 and 109 rads(Si)/sec. These performance and radiation hardness characteristics appear to be achievable for large-scale-integration (LSI) of PMOS/SOS circuits, utilizing commercially-proven process techniques.

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