Application of Boolean unification to combinational logic synthesis
- 10 December 2002
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
The authors present various applications of Boolean unification to combinational logic synthesis. Three topics of combinational logic synthesis are discussed: redesign, multilevel logic minimization, and minimization of Boolean relations. All of these problems can be uniformly formalized as Boolean unification problems. Experimental results are also reported.<>Keywords
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